1. Technical Field
The embodiments described herein relate to a semiconductor integrated circuit, and more particularly, to a test circuit for a semiconductor integrated circuit.
2. Related Art
In general, the input and output modes of a conventional semiconductor integrated devices can be divided into an X4 input and output mode, an X8 input and output mode, an X16 input and output mode, and so on, depending upon the number of input and output pins. These input and output modes can determine the bandwidths of data that can be processed at a time.
To decrease the test time when testing conventional semiconductor integrated circuits, a number of semiconductor integrated circuits are simultaneously tested in parallel. In this case, the input and output pins of a tester must be assigned in accordance with the configuration of a semiconductor integrated circuit to be tested. That is to say, when testing a semiconductor integrated circuit having an X32 input and output mode, 32 input and output pins of a tester must be assigned in accordance with the X32 input and output mode. Consequently, the number of semiconductor integrated circuits to be tested in parallel is limited due to the limited number of the input and output pins of the tester. This limit on the number of circuits that can be tested in parallel, necessarily increases the overall test time.
In certain instances, the input and output mode of an internal circuit is changed to an X16 input and output mode so that the test can be conducted by compressing input and output pins in order to improve the efficiency of the parallel test; however, defects in certain input and output pins may not be detected when this is done.